SVC 1 – Wait

There is not branch entry for Wait.  It is only entered through a SVC call.  On entry R4 is the address of the TCB and R5 is the address of the current RB which is always true for any SVC routine.  Register 1 is a pointer to either an ECB or a list of ECB’s.  If the high order bit of R1 is zero it is the address of a single ECB.  If the high order bit is one then it is the address of a list of pointers to ECB’s.  The last pointer in the list must have the high order bit set to one.

000000                               11 S001WAIT CSECT ,
000000 18CF                          12          LR    R12,R15            ESTABLISH
                            00000    13          USING S001WAIT,R12                BASE REGISTER
                                     14 *
                            00000    15          USING @TCB,R4
                            00000    16          USING @RB,R5
                                     17 *
000002 18A1                          18          LR    R10,R1             COPY PARM LIST
000004 18B1                          19          LR    R11,R1             COPY PARM LIST
000006 1211                          20          LTR   R1,R1              CHECK FOR ECB OR LIST
000008 47D0 C048      00048          21          BNP   LIST               BRANCH IF LIST OF ECB'S

After initial setup the high-order bit of Register 1 is checked using the Load Test Register instruction.  If the high order bit is one then LTR will indicate a negative value.  If it is zero then LTR will indicate positive.

00000C                               23 WAIT010  DS    0H
00000C 9180 1000      00000          24          TM    0(R1),X'80'        IS ECB ALREADY WAITING
000010 4710 C0E8      000E8          25          BO    WAIT900              YES - ABEND
                                     26 *
000014 9140 1000      00000          27          TM    0(R1),X'40'        ECB ALREADY POSTED
000018 4710 C03E      0003E          28          BO    WAIT020              YES - NO NEED TO WAIT
                                     29 *
00001C 1825                          30          LR    R2,R5               RB ADDRESS
00001E BF28 C0FC      000FC          31          ICM   R2,B'1000',=X'80'   SET WAIT BIT
000022 5020 1000      00000          32          ST    R2,0(,R1)           SAVE INTO ECB
                                     33 *
000026 9201 5004      00004          34          MVI   RBWTCNT,1           SET WAIT COUNT TO ONE
00002A 9680 4004      00004          35          OI    TCBFLGS,TCBFWAIT    SET WAIT BIT
                                     36 *
00002E 5810 0014      00014          37          L     R1,20               MVT ADDRESS
000032 5810 1024      00024          38          L     R1,MVTEXIT-@MVT(,R1)   EXIT ROUTINE
000036 5010 401C      0001C          39          ST    R1,TCBPSW+4         MAKE IT RESUME POINT FROM WAIT
00003A 5010 405C      0005C          40          ST    R1,TCBREG15         SET R15 TO EP AT RESUME
                                     41 *
00003E                               42 WAIT020  DS    0H
00003E 58F0 0014      00014          43          L     R15,20              MVT ADDRESS
000042 58F0 F004      00004          44          L     R15,MVTDISP-@MVT(,R15)  DISPATCHER ADDRESS
000046 07FF                          45          BR    R15

For a single ECB we begin by checking to see if the wait bit x’80’ is already set indicating the ECB is being waited on by another RB.  If it is set we branch to generate an Abend.  Next we check to see if the post bit x’40’ is set.  It is possible that the ECB was posted as complete before the Wait SVC was issued.  If it is already posted then we can just exit without waiting.

If we need to wait we place the address of our RB into the ECB and set the wait bit.  We also set the wait count in the RB to one.  Currently we allow only a wait count of one but have the option of changing this later.  Since we set the wait count in top RB we also need to set the wait bit in the TCB so the Dispatcher will not dispatch this TCB until the ECB is posted and the wait count in the RB is cleared.

Finally we get the address of the Exit routine and use it to update the contents of the TCB before branching to the Dispatcher.  We branch to the Dispatcher instead of the Exit routine because we want to interrupt execution of this RB at this point until the ECB has been posted.  If we branched to the Exit routine control would immediately be returned to the location immediately following the SVC 1.  To cause the wait we have set the Wait Bit in the TCB Flags so the TCB will not be dispatched.  When the post routine clears the Wait Bit the Dispatcher will at some point transfer control to this TCB.  When that happens we need to branch to the Exit Routine so control is returned to the caller of the SVC.  To accomplish this we set the PSW to point to the Exit Routine.  We must also replace the contents of Register 15 with the address of the Exit Routine.  Now when the Wait Bit is cleared and the Dispatcher transfers control to the TCB the PSW and register will be loaded from the TCB resulting in a branch to the Exit Routine.

000048                               49 LIST     DS    0H
000048                               50 LIST010  DS    0H
000048 5810 A000      00000          51          L     R1,0(,R10)         GET ECB ADDRESS
00004C 9180 1000      00000          52          TM    0(R1),X'80'        ECB ALREADY WAITING?
000050 4710 C0E8      000E8          53          BO    WAIT900             YES - ABEND
                                     54 *
000054 9180 A000      00000          55          TM    0(R10),X'80'      END OF LIST
000058 4710 C064      00064          56          BO    LIST020
                                     57 *
00005C 41A0 A004      00004          58          LA    R10,4(,R10)       NEXT ECB IN LIST
000060 47F0 C048      00048          59          B     LIST010           LOOP BACK

Processing a list of ECB’s is pretty much the same process but what have to loop through the list.  We begin by looping through the list to verify none of the ECB’s have the Wait Bit set.  If we find an ECB with the Wait Bit set we branch to Abend.

000064                               63 LIST020  DS    0H
000064 18AB                          64          LR    R10,R11           START OVER
000066                               65 LIST030  DS    0H
000066 5810 A000      00000          66          L     R1,0(,R10)        GET ECB ADDRESS
00006A 9140 1000      00000          67          TM    0(R1),X'40'       ALREADY POSTED ?
00006E 4710 C03E      0003E          68          BO    WAIT020            YES - NO NEED TO WAIT
                                     69 *
000072 9180 A000      00000          70          TM    0(R10),X'80'      END OF LIST
000076 4710 C082      00082          71          BO    LIST040
                                     72 *
00007A 41AA 0004      00004          73          LA    R10,4(R10)        NEXT ECB IN LIST
00007E 47F0 C066      00066          74          B     LIST030           LOOP BACK

Next we check to see if any of the ECB’s in the list are already posted.  If any one of the ECB’s has been posted we don’t need to wait.

000082                               78 LIST040  DS    0H
000082 18AB                          79          LR    R10,R11           START OVER AT TOP OF LIST
000084 1825                          80          LR    R2,R5             RB ADDRESS
000086 BF28 C0FC      000FC          81          ICM   R2,B'1000',=X'80'  SET WAIT BIT
00008A                               82 LIST050  DS    0H
00008A 5810 A000      00000          83          L     R1,0(,R10)        GET ECB ADDRESS
00008E 5020 1000      00000          84          ST    R2,0(,R1)         SET ECB CONTENTS
000092 9180 A000      00000          85          TM    0(R10),X'80'      END OF LIST
000096 4710 C0A2      000A2          86          BO    LIST060
                                     87 *
00009A 41A0 A004      00004          88          LA    R10,4(,R10)       NEXT ECB IN LIST
00009E 47F0 C08A      0008A          89          B     LIST050           LOOP BACK

Next we loop through the list and place the address of the RB into each ECB while we also set the Wait Bit.

0000A2                               92 LIST060  DS    0H
0000A2 9201 5004      00004          93          MVI   RBWTCNT,1           SET WAIT COUNT TO ONE
0000A6 9680 4004      00004          94          OI    TCBFLGS,TCBFWAIT    SET WAIT BIT
                                     95 *
0000AA 4110 C0C4      000C4          96          LA    R1,LIST070          RESUME HERE AFTER WAIT POSTED
0000AE 5010 401C      0001C          97          ST    R1,TCBPSW+4         MAKE IT RESUME POINT FROM WAIT
                                     98 *
0000B2 50B0 4024      00024          99          ST    R11,TCBREG1         R1 WILL POINT TO ECB LIST
0000B6 50C0 4050      00050         100          ST    R12,TCBREG12        R12 WILL CONTAIN BASE ADDRESS
                                    101 *
0000BA 58F0 0014      00014         102          L     R15,20              MVT ADDRESS
0000BE 58F0 F004      00004         103          L     R15,MVTDISP-@MVT(,R15)  DISPATCHER ADDRESS
0000C2 07FF                         104          BR    R15

Now we set up our branch to the Dispatcher.  Like before we set the RB Wait Count and the TCB Wait Flag.  Instead of setting up for a branch to the Exit Routine this time we come back to our code.  We set this up by updating the PSW in the TCB.  We also store Register 1 and Register 12 in the TCB so they will be available when the TCB is once again dispatched.

0000C4                              108 LIST070  DS    0H
0000C4 18A1                         109          LR    R10,R1             POINT TO ECB LIST
0000C6                              110 LIST080  DS    0H
0000C6 5810 1000      00000         111          L     R1,0(,R1)          ECB ADDRESS
0000CA 947F 1000      00000         112          NI    0(R1),X'FF'-X'80'  TURN OFF WAIT BIT
                                    113 *
0000CE 9180 A000      00000         114          TM    0(R10),X'80'       END OF LIST
0000D2 4710 C0DE      000DE         115          BO    LIST090
                                    116 *
0000D6 41A0 A004      00004         117          LA    R10,4(,R10)        NEXT ECB PTR
0000DA 47F0 C0C6      000C6         118          B     LIST080            LOOP BACK FOR NEXT ECB

When we get redispatched after the post we need to go through the ECB list and turn off the waiting bit for each ECB in the list.  Once that is done we branch to the Exit Routine.

0000DE                              121 LIST090  DS    0H
0000DE 58F0 0014      00014         122          L     R15,20              MVT ADDRESS
0000E2 58F0 F024      00024         123          L     R15,MVTEXIT-@MVT(,R15)   EXIT ROUTINE
0000E6 07FF                         124          BR    R15
                                    125 *
0000E8                              127 WAIT900  DS    0H
0000E8 5810 C0F8      000F8         128          L     R1,=A(X'101')      ABEND CODE
                                    129          @CALL ABEND
0000EC 58F0 0014      00014         130+         L     R15,20             MVT ADDRESS
0000F0 58F0 F020      00020         131+         L     R15,MVTABEND-@MVT(,R15) ROUTINE ADDRESS
0000F4 05EF                         132+         BALR  R14,R15

If a ECB with the Wait Bit was passed to the Wait SVC routine an Abend x’101′ will be issued.

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