Our first version of a nucleus will not do much – but it will do something! \u00a0It will set a value in the Interval Timer. \u00a0The CPU will subtract from this value several times every second. \u00a0When the value goes to zero an External Interrupt will be generated. \u00a0This will cause the CPU to save the current PSW into the External Old PSW area in low core and load a new PSW from the External New PSW location. \u00a0In our interrupt routine we will reset the Interval Timer and load a PSW with the wait bit set – but enabled for interrupts.<\/p>\n
TXXNUC CSECT ,\r\n DC X'00',X'00',AL2(0),AL4(DISPINIT) INITIAL PSW\r\n DC D'0' RST NEW PSW\r\n*\r\n DC A(CVT) COMM VECT TABLE\r\n DC A(MVT) MOD VECT TABLE\r\n*\r\n DC D'0' EXT OLD PSW\r\n DC D'0' SVC OLD PSW\r\n DC D'0' PGM OLD PSW\r\n DC D'0' MCK OLD PSW\r\n DC D'0' I\/O OLD PSW\r\n*\r\n DC D'0' CHANNEL STATUS WORD\r\n DC F'0' CHANNEL ADDRESS WORD\r\n DC F'0'\r\n DC F'0' INTERVAL TIMER\r\n DC F'0'\r\n*\r\n DC X'00',X'00',AL2(0),AL4(EXTHNDLR) EXT NEW PSW\r\n DC X'00',X'00',AL2(0),AL4(SVCHNDLR) SVC NEW PSW\r\n DC X'00',X'00',AL2(0),AL4(PGMHNDLR) PGM NEW PSW\r\n DC X'00',X'00',AL2(0),AL4(@E@MCK) MCK NEW PSW\r\n DC X'00',X'00',AL2(0),AL4(IOHNDLR) I\/O NEW PSW\r\n*\r\n*\r\nLOWCLEN EQU *-TXXNUC\r\nLOWCFILL EQU 1024-LOWCLEN\r\n DC (LOWCFILL)X'00'<\/pre>\nWe begin by filling in some low core values needed by the CPU. \u00a0We specify the PSW’s to be loaded when the corresponding interrupt occurs. \u00a0Finally we pad low core up to 1k (1024) with binary zeros.<\/p>\n
EXTREGS DC 16F'0' EXT INTERRUPT REG SAVE\r\nIOREGS DC 16F'0' I\/O INTERRUPT REG SAVE\r\nSVCREGS DC 16F'0' SVC INTERRUPT REG SAVE\r\nPGMREGS DC 16F'0' PGM INTERRUPT REG SAVE\r\n*\r\n*\r\nCVT DC A(0) +++ PLACE HOLDER +++\r\nMVT DC A(0) +++ PLACE HOLDER +++<\/pre>\nNext we go ahead and define some data areas. \u00a0These will not be used right now but they will be needed in later versions of our nucleus code.<\/p>\n
USING TXXNUC,0\r\n*\r\nSVCHNDLR DS 0H\r\nPGMHNDLR DS 0H\r\nIOHNDLR DS 0H\r\n LPSW WAITPSW\r\n*\r\n DS 0D\r\nWAITPSW DC X'00',X'02',AL2(0),A(X'EE9999')<\/pre>\nIf an SVC, Program, or I\/O interrupt occurs we load a disabled wait PSW.<\/p>\n
EXTHNDLR DS 0H\r\n L R1,=A(X'80') INTERVAL TIMER VALUE\r\n ST R1,ITIMER-@LOWCORE SAVE INTO TIMER\r\n*\r\n LPSW IWAIT LOAD WAIT PSW\r\n*\r\n DS 0D\r\nIWAIT DC AL1(255,2,0,0),AL4(X'FEAD')\r\n*\r\n*\r\nDISPINIT DS 0H\r\n B EXTHNDLR<\/pre>\nWhen an External interrupt occurs we store a new value into the interval timer and then load an Enabled Wait PSW. \u00a0The PSW must be enabled for External interrupts so our interrupt routine will be invoked when the timer expires.<\/p>\n
@LOWCORE ,\r\n*\r\n @REGS ,\r\n @@ERR ,\r\n END ,<\/pre>\nFinally we include our macros for mapping low core and registers. \u00a0I have also created a new macro called @@ERR to contain wait state codes.<\/p>\n
Once the nucleus is assembled and link edited as TXXNUC we can fire up Hercules and IPL from our DASD volume. \u00a0We should see our enabled wait PSW with the code ‘FEAD’ and we should observe the CPU waking up and performing a few instructions before going \u00a0back into the wait state.<\/p>\n
[Next – Dispatcher<\/a>]<\/p>\n","protected":false},"excerpt":{"rendered":"
Our first version of a nucleus will not do much – but it will do something! \u00a0It will set a value in the Interval Timer. \u00a0The CPU will subtract from this value several times every second. \u00a0When the value goes … Continue reading